1 1 1/12/01 supertex inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." supertex does not assume responsibility for use of devices described and limits its liabi lity to the replacement of devices determined to be defective due to workmanship. no responsibility is assumed for possible omissions or inaccuracies. circuitry and specifications are subject to c hange without notice. for the latest product specifications, refer to the supertex website: http://www.supertex.com. for complete liability information on all supertex products, refer to the most curre nt databook or to the legal/disclaimer page on the supertex website. VN3205 advanced dmos technology these enhancement-mode (normally-off) transistors utilize a vertical dmos structure and supertex s well-proven silicon-gate manufacturing process. this combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in mos devices. characteristic of all mos structures, these devices are free from thermal runaway and thermally- induced secondary breakdown. supertex s vertical dmos fets are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. features ? free from secondary breakdown ? low power drive requirement ? ease of paralleling ? low c iss and fast switching speeds ? excellent thermal stability ? integral source-drain diode ? high input impedance and high gain ? complementary n- and p-channel devices applications ? motor controls ? converters ? amplifiers ? switches ? power supply circuits ? drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) absolute maximum ratings drain-to-source voltage bv dss drain-to-gate voltage bv dgs gate-to-source voltage 20v operating and storage temperature -55 c to +150 c soldering temperature* 300 c * distance of 1.6 mm from case for 10 seconds. t o-92 d 1 d 4 g 1 g 4 s 1 s 4 nc nc s 2 s 3 g 2 g 3 d 2 d 3 package options note: see package outline section for dimensions. 1 7 6 5 4 3 2 top view 14 13 12 11 10 9 8 14-pin dip t o-243aa (sot-89) s g d g d s d bv dss /r ds(on) v gs(th) order number / package bv dgs (max) (max) to-92 14-pin p-dip to-243aa* die ? 50v 0.3 ? 2.4v VN3205n3 VN3205n6 VN3205n8 VN3205nd * same as sot-89. product supplied on 2000 piece carrier tape reels. ? mil visual screening available ordering information n-channel enhancement-mode v ertical dmos fets product marking for to-243aa: vn2l ? where ? = 2-week alpha date code
2 symbol parameter min typ max unit conditions bv dss drain-to-source breakdown voltage 50 v v gs = 0v, i d = 10ma v gs(th) gate threshold voltage 0.8 2.4 v v gs = v ds , i d = 10ma ? v gs(th) change in v gs(th) with temperature -4.3 -5.5 mv/ cv gs = v ds , i d = 10ma i gss gate body leakage 1 100 na v gs = 20v, v ds = 0v i dss zero gate voltage drain current 10 av gs = 0v, v ds = max rating 1ma v gs = 0v, v ds = 0.8 max rating t a = 125 c i d(on) on-state drain current 3.0 14 a v gs = 10v, v ds = 5v r ds(on) to-92 and p-dip 0.45 ? v gs = 4.5v, i d = 1.5a sot-89 0.45 ? v gs = 4.5v, i d = 0.75a to-92 and p-dip 0.3 ? v gs = 10v, i d = 3a sot-89 0.3 ? v gs = 10v, i d = 1.5a ? r ds(on) change in r ds(on) with temperature 0.85 1.2 %/ cv gs = 10v, i d = 3a g fs forward transconductance 1.0 1.5 v ds = 25v, i d = 2a c iss input capacitance 220 300 c oss common source output capacitance 70 120 pf c rss reverse transfer capacitance 20 30 t d(on) turn-on delay time 10 t r rise time 15 t d(off) turn-off delay time 25 t f fall time 25 v sd diode forward voltage drop 1.6 v v gs = 0v, i sd = 1.5a t rr reverse recovery time 300 ns v gs = 0v, i sd = 1a notes : 1. all d.c. parameters 100% tested at 25 c unless otherwise stated. (pulse test: 300 s pulse, 2% duty cycle.) 2. all a.c. parameters sample tested. package i d (continuous)* i d (pulsed) power dissipation jc ja i dr *i drm @ t c = 25 c c/w c/w to-92 1.2a 8.0a 1.0w 125 170 1.2a 8.0a sot-89 1.5a 8.0a 1.6w (t a = 25 c) 15 78 ? 1.5a 8.0a plastic dip 1.5a 8.0a 3.0w 41.6 83.3 1.5a 8.0a * i d (continuous) is limited by max rated t j . t a = 25 c. ? mounted on fr5 board, 25mm x 25mm x 1.57mm. significant p d increase possible on ceramic substrate. t otal for package. VN3205 electrical characteristics (@ 25 c unless otherwise specified) ns thermal characteristics v gs = 0v, v ds = 25v f = 1 mhz v dd = 25v i d = 2a r gen = 10 ? static drain-to-source on-state resistance ? switching waveforms and test circuit 90% 10% 90% 90% 10% 10% pulse generator v dd r l output d.u.t. t (on) t d(on) t (off) t d(off) t f t r input input output 10v v dd r gen 0v 0v
3 output characteristics 20 16 12 8 4 0 v ds (volts) v ds (volts) v ds (volts) i d (amperes) i d (amperes) saturation characteristics maximum rated safe operating area 0 100 10 1 10 1.0 0.1 .01 i d (amperes) thermal response characteristics thermal resistance (normalized) 1.0 0.8 0.6 0.4 0.2 0 0.001 10 0.01 0.1 1.0 t p (seconds) t ransconductance vs. drain current 5 4 3 2 1 0 04 2 g fs (siemens) i d (amperes) power dissipation vs. temperature 0 150 100 50 2.0 1.6 1.2 0.8 0.4 0 125 75 25 t c ( c) p d (watts) p-dip to-243aa (t a = 25 c) to-92 t a = -55 c 0102030 50 40 4v 3v 0246 10 8 125 c 610 8 10v 8v 6v 20 16 12 8 4 0 4v 3v 10v 8v 6v to-92 (pulsed) p-dip (pulsed) to-243aa (dc) to-92 (dc) p-dip (dc) v gs = v gs = v ds = 25v to-243aa t a = 25 c p d = 1.6w to-243aa (pulsed) t c = 25 c
to-92 p d = 1w t c = 25 c 25 c t ypical performance curves VN3205
4 1235 bordeaux drive, sunnyvale, ca 94089 tel: (408) 744-0100 ?fax: (408) 222-4895 www.supertex.com 1 1/12/01 ?001 supertex inc. all rights reserved. unauthorized use or reproduction prohibited. gate drive dynamic characteristics q (nanocoulombs) g v gs (volts) t j ( c) v gs(th) (normalized) r ds(on) (normalized) v ds(on) gs(th) and r variation with temperature on-resistance vs. drain current r ds(on) (ohms) variation with temperature dss dss bv (normalized) c) ( t j transfer characteristics v gs (volts) i (amperes) d capacitance vs. drain-to-source voltage 300 c (picofarads) v ds (volts) i d (amperes) bv 0102 03040 100 400 200 0 0246810 10 8 6 4 2 0 -50 0 50 100 150 1.1 1.0 1.0 0.8 0.6 0.4 0.2 0 1.2 1.1 1.0 0.9 0.8 0.7 10 8 6 4 2 012 3 45 -50 0 50 100 150 325 pf v ds = 40v v ds = 10v v gs = 4.5v v gs = 10v t = -55 c a v ds = 25v 125 c 04812 20 16 f = 1mhz c iss c oss c rss 0.9 215 pf 1.6 1.4 1.2 1.0 0.8 0.6 v gs(th) @ 1ma 25 c 0 r ds(on) @ 10v, 3a VN3205 t ypical performance curves
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